Please use this identifier to cite or link to this item:
|Title:||Effect of different nano meter technology based FPGA on energy efficient UART design|
|Publisher:||Institute of Electrical and Electronics Engineers Inc.|
|Abstract:||In this paper, the main aim of authors is to design UART that is implemented on Xilinx ISE Design 14.1 and results were tested on Virtex-4 90nm FPGA, Virtex-5 65nm FPGA and Virtex-6 40nm FPGA. For 90nm FPGA, device used is Virtex-4, part name is xc4vfx12, package used is sf363, and it is working on-12 speed grade at an ambient temperature of 50.0 �C. For 65nm FPGA, device used is Virtex-5, part name-xc5vlx20t, package used is ff323, and it is working on-2 speed grade at an ambient temperature of 50.0 �C. For 40nm FPGA, device used is Virtex-6, part name is xc6vlx75t, package used is ff484, and it is working on-3 speed grade at an ambient temperature of 50.0 �C. In this paper, UART code is written in Verilog language and power is analyzed for 65nm, 90nm and 40nm technology based FPGA. � 2018 IEEE.|
|Appears in Collections:||Conferences|
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.